Silicon Labs /Series0 /EFM32WG /EFM32WG332F64 /DAC0 /CH1CTRL

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Interpret as CH1CTRL

31282724232019161512118743000000000000000000000000000000000000000000 (EN)EN0 (REFREN)REFREN0 (PRSEN)PRSEN0 (PRSCH0)PRSSEL

PRSSEL=PRSCH0

Description

Channel 1 Control Register

Fields

EN

Channel 1 Enable

REFREN

Channel 1 Automatic Refresh Enable

PRSEN

Channel 1 PRS Trigger Enable

PRSSEL

Channel 1 PRS Trigger Select

0 (PRSCH0): PRS ch 0 triggers channel 1 conversion.

1 (PRSCH1): PRS ch 1 triggers channel 1 conversion.

2 (PRSCH2): PRS ch 2 triggers channel 1 conversion.

3 (PRSCH3): PRS ch 3 triggers channel 1 conversion.

4 (PRSCH4): PRS ch 4 triggers channel 1 conversion.

5 (PRSCH5): PRS ch 5 triggers channel 1 conversion.

6 (PRSCH6): PRS ch 6 triggers channel 1 conversion.

7 (PRSCH7): PRS ch 7 triggers channel 1 conversion.

8 (PRSCH8): PRS ch 8 triggers channel 1 conversion.

9 (PRSCH9): PRS ch 9 triggers channel 1 conversion.

10 (PRSCH10): PRS ch 10 triggers channel 1 conversion.

11 (PRSCH11): PRS ch 11 triggers channel 1 conversion.

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